Atari 130 XE

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Contents

links

[8 bit forum on Atariage]

Specifications

Cpu [6502] @ 1.79Mhz
Ram 128K
Rom 24K
Resolutions 16 colour mode: 320 x 192

128 colour mode: 40 x 24 Sprite hardware

keyboard 64 key full travel
Power requirements: +5/+12VDC

Memory map

Hardware

Documentation

[Atari SIO documentation]

pinouts

Atari standard joystick ports

Looking at the cable:

     1 2 3 4 5
  |-------------|
   \ o o o o o /
    \ o o o o /
     ---------
      6 7 8 9
Pinout
Pin # Joystick Trackball Analog stick Light pen
1 /up X direction n/c n/c
2 /down X Motion n/c n/c
3 /left Y Direction n/c n/c
4 /right Y Motion n/c n/c
5 n/c n/c B pot n/c
6 /button Light pen in
7 +5v
8 ground
9 n/c n/c A Pot n/c

Note that all data pins are active low, although lack pull-ups.

The +5v signal is optional, and is only used on joysticks which have autofire.

TV RF

RCAPhono.png

Pin Desc
1 Signal ground
2 UHF video signal

Power

Din7.png

Pin Desc
1 +5v
2 Shield
3 Ground
4 +5v
5 Ground
6 +5v
7 Ground

Monitor port

Din5-nocenter.png

Pin Desc
1 Composite Luminance
2 Composite Video
3 Ground
4 Composite Chrominance
5 Audio Output

Cart port

   A B C D E F H J K L M N P R S
 +|-|-|-|-|-|-|-|-|-|-|-|-|-|-|-|+
 |                               |
 +|-|-|-|-|-|-|-|-|-|-|-|-|-|-|-|+
   1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
                     1 1 1 1 1 1 
Pin Desc Pin Desc
1 S4' Chip Select--$8000 to $9FFF A. RD4 ROM present--$8000 to $9FFF
2 A3 CPU Address bus line B. GND Ground
3 A2 CPU Address bus line C. A4 CPU Address bus line
4 A1 CPU Address bus line D. A5 CPU Address bus line
5 A0 CPU Address bus line E. A6 CPU Address bus line
6 D4 CPU Data bus line F. A7 CPU Address bus line
7 D5 CPU Data bus line H. A8 CPU Address bus line
8 D2 CPU Data bus line J. A9 CPU Address bus line
9 D1 CPU Data bus line K. A12 CPU Address bus line
10 D0 CPU Data bus line L. D3 CPU Data bus line
11 D6 CPU Data bus line M. D7 CPU Data bus line
12 S5' Chip Select--$A000 to $BFFF N. A11 CPU Address bus line
13 +5V P. A10 CPU Address bus line
14 RD5 ROM present--$A000 to $BFFF R. R/W' CPU read/write
15 CCTL' Cartridge control select S. B02,Phi2 CPU Phase 2 clock

Expansion port bus slot

   A B C D E F H 
 +|-|-|-|-|-|-|-|+
 |               |
 +|-|-|-|-|-|-|-|+
   1 2 3 4 5 6 7 
Pin Desc Pin Desc
A Reserved 1 EXTSEL' External Select
B IRQ' Interrupt request 2 RST' Reset output
C HALT' Halt CPU 3 D1XX' Chip select at area $D1xx
D A13 CPU Address bus line 4 MPD' Math Pack (FP) Disable
E A14 CPU Address bus line 5 Audio input
F A15 CPU Address bus line 6 REF' Refresh cycle
H GND Ground 7 +5V

Atari SIO port

Atari SIO pinout

Pin Desc
1 Clock input
2 Clock output
3 Data input
4 Ground
5 Data output
6 Ground
7 Command
8 Motor control
9 Proceed
10 +5v/Ready
11 Audio output
12 N/C (12v on some older models)
13 Int